Datasheet

189
XMEGA B [DATASHEET]
8291B–AVR–01/2013
time insertion between LS and HS switching. The DTI output will override the normal port value according to the port
override setting. Refer to “I/O Ports” on page 126 for more details.
The pattern generation unit can be used to generate a synchronized bit pattern on the port it is connected to. In addition,
the WG output from compare channel A can be distributed to and override all the port pins. When the pattern generator
unit is enabled, the DTI unit is bypassed.
The fault protection unit is connected to the event system, enabling any event to trigger a fault condition that will disable
the AWeX output. The event system ensures predictable and instant fault reaction, and gives flexibility in the selection of
fault triggers.
15.3 Port Override
The port override logic is common for all the timer/counter extensions. Figure 15-2 on page 190 shows a schematic
diagram of the port override logic. When the dead-time enable (DTIENx) bit is set, the timer/counter extension takes
control over the pin pair for the corresponding channel. Given this condition, the output override enable (OOE) bits take
control over the CCxEN bits.