Datasheet
144
XMEGA B [DATASHEET]
8291B–AVR–01/2013
Bit 3:0 – VP2MAP: Virtual Port 2 Mapping
These bits decide which ports should be mapped to Virtual Port 2. The registers DIR, OUT, IN, and INTFLAGS will be
mapped. Accessing the virtual port registers is equal to accessing the actual port registers. See Table 12-7 on page 144
for configuration.
Table 12-7. Virtual port mapping
12.13.4 CLKEVOUT – Clock and Event Out register
Bit 7 – CLKEVPIN: Clock and Event Output Pin Select
Setting this pin enables output of clock and event pins on port pin 4 instead of port pin 7.
Bit 6 – RTCOUT: RTC Clock Output Enable
Setting this bit enables output of the RTC clock source on PORTC pin 6.
Bit 5:4 – EVOUT[1:0]: Event Output Port
These bits decide which port event channel 0 from the event system will be output to. Pin 7 on the selected port is the
default used, and the CLKOUT bits must be set differently from those of EVOUT. The port pin must be configured as
output for the event to be available on the pin.
VPnMAP[3:0] Group Configuration Description
0000 PORTA PORTA mapped to Virtual Port n
0001 PORTB PORTB mapped to Virtual Port n
0010 PORTC PORTC mapped to Virtual Port n
0011 PORTD PORTD mapped to Virtual Port n
0100 PORTE PORTE mapped to Virtual Port n
0101 PORTF PORTF mapped to Virtual Port n
0110 PORTG PORTG mapped to Virtual Port n
0111 PORTH PORTH mapped to Virtual Port n
1000 PORTJ PORTJ mapped to Virtual Port n
1001 PORTK PORTK mapped to Virtual Port n
1010 PORTL PORTL mapped to Virtual Port n
1011 PORTM PORTM mapped to Virtual Port n
1100 PORTN PORTN mapped to Virtual Port n
1101 PORTP PORTP mapped to Virtual Port n
1110 PORTQ PORTQ mapped to Virtual Port n
1111 PORTR PORTR mapped to Virtual Port n
Bit 7 6543210
+0x04 CLKEVPIN RTCOUT EVOUT[1:0] CLKOUTSEL[1:0] CLKOUT[1:0]
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0