Datasheet

87
XMEGA A3U [DATASHEET]
Atmel-8386D-AVR-ATxmega64A3U-128A3U-192A3U-256A3U–03/2014
36.1.16 Two-Wire Interface Characteristics
Table 36-32 describes the requirements for devices connected to the Two-Wire Interface Bus. The Atmel AVR XMEGA
Two-Wire Interface meets or exceeds these requirements under the noted conditions. Timing symbols refer to Figure 36-
7.
Figure 36-7. Two-wire interface bus timing.
Table 36-32. Two-wire interface characteristics.
t
HD;STA
t
of
SDA
SCL
t
LOW
t
HIGH
t
SU;STA
t
BUF
t
r
t
HD;DAT
t
SU;DAT
t
SU;STO
Symbol Parameter Condition Min. Typ. Max. Units
V
IH
Input High Voltage 0.7*V
CC
V
CC
+0.5 V
V
IL
Input Low Voltage -0.5 0.3*V
CC
V
V
hys
Hysteresis of Schmitt Trigger Inputs 0.05*V
CC
(1)
0 V
V
OL
Output Low Voltage 3mA, sink current 0 0.4 V
t
r
Rise Time for both SDA and SCL 20+0.1C
b
(1)(2)
0 ns
t
of
Output Fall Time from V
IHmin
to V
ILmax
10pF < C
b
< 400pF
(2)
20+0.1C
b
(1)(2)
300 ns
t
SP
Spikes Suppressed by Input Filter 0 50 ns
I
I
Input Current for each I/O Pin 0.1V
CC
< V
I
< 0.9V
CC
-10 10 µA
C
I
Capacitance for each I/O Pin 10 pF
f
SCL
SCL Clock Frequency f
PER
(3)
>max(10f
SCL
, 250kHz) 0 400 kHz
R
P
Value of Pull-up resistor
f
SCL
 100kHz

f
SCL
> 100kHz
t
HD;STA
Hold Time (repeated) START condition
f
SCL
 100kHz 4.0
µs
f
SCL
> 100kHz 0.6
t
LOW
Low Period of SCL Clock
f
SCL
 100kHz 4.7
µs
f
SCL
> 100kHz 1.3
t
HIGH
High Period of SCL Clock
f
SCL
 100kHz 4.0
µs
f
SCL
> 100kHz 0.6
V
CC
0.4V–
3mA
----------------------------
100ns
C
b
---------------
300ns
C
b
---------------