Datasheet
56
XMEGA A3U [DATASHEET]
Atmel-8386D-AVR-ATxmega64A3U-128A3U-192A3U-256A3U–03/2014
Table 32-3. Port C - alternate functions.
Notes: 1. Pin mapping of all TC0 can optionally be moved to high nibble of port.
2. If TC0 is configured as TC2 all eight pins can be used for PWM output.
3. Pin mapping of all USART0 can optionally be moved to high nibble of port.
4. Pins MOSI and SCK for all SPI can optionally be swapped.
5. CLKOUT can optionally be moved between port C, D and E and be on pin 4 or 7.
6. EVOUT can optionally be moved between port C, D and E and be on pin 4 or 7.
Table 32-4. Port D - alternate functions.
Notes: 1. Pin mapping of all TC0 can optionally be moved to high nibble of port.
2. If TC0 is configured as TC2 all eight pins can be used for PWM output.
3. Pin mapping of all USART0 can optionally be moved to high nibble of port.
4. Pins MOSI and SCK for all SPI can optionally be swapped.
5. CLKOUT can optionally be moved between port C, D and E and be on pin 4 or 7.
6. EVOUT can optionally be moved between port C, D and E and be on pin 4 or 7.
PORTC PIN# INTERRUPT TCC0
(1)(2)
AWEXC TCC1 USART
C0
(3)
USART
C1
SPIC
(4)
TWIC
TWIC
w/ext
driver
CLOCKOUT
(5)
EVENTOUT
(6)
PC0 16 SYNC OC0A OC0ALS SDA SDAIN
PC1 17 SYNC OC0B OC0AHS XCK0 SCL SCLIN
PC2 18
SYNC/
ASYNC
OC0C OC0BLS RXD0 SDAOUT
PC3 19 SYNC OC0D OC0BHS TXD0 SCLOUT
PC4 20 SYNC OC0CLS OC1A SS
PC5 21 SYNC OC0CHS OC1B XCK1 MOSI
PC6 22 SYNC OC0DLS RXD1 MISO RTCOUT
PC7 23 SYNC OC0DHS TXD1 SCK clk
PER
EVOUT
GND 24
VCC 25
PORT D PIN # INTERRUPT TCD0 TCD1 USBD USARTD0 USARTD1 SPID CLOCKOUT EVENTOUT
PD0 26 SYNC OC0A
PD1 27 SYNC OC0B XCK0
PD2 28 SYNC/ASYNC OC0C RXD0
PD3 29 SYNC OC0D TXD0
PD4 30 SYNC OC1A SS
PD5 31 SYNC OC1B XCK1 MOSI
PD6 32 SYNC D- RXD1 MISO
PD7 33 SYNC D+ TXD1 SCK clk
PER
EVOUT
GND 34
VCC 35