Datasheet

77
[Not recommended for new designs - Use XMEGA A1U series] XMEGA A1 [DATASHEET]
8067O–AVR–06/2013
Table 34-6. ADC gain stage characteristics.
Conversion rate
V
CC
2.0V 2000
ksps
V
CC
<2.0V 500
Conversion time
(propagation delay)
(RES+2)/2+GAIN
RES = 8 or 12, GAIN = 0 or 1
5 7 8
ADC
clk
cycles
Sampling Time 1/2 ADC
clk
cycle 0.25 µS
Conversion range 0 VREF V
AVCC Analog Supply Voltage V
cc
-0.3 V
cc
+0.3 V
VREF Reference voltage 1.0 V
cc
-0.6 V
Input bandwidth
V
CC
2.0V 2000
kHz
V
CC
<2.0V 500
INT1V Internal 1.00V reference 1.00 V
INTVCC Internal V
CC
/1.6 V
CC
/1.6 V
SCALEDVCC
Scaled internal V
CC
/10 input V
CC
/10 V
R
AREF
Reference input resistance >10 M
Start-up time 12 24
ADC
clk
cycles
Internal input sampling speed
Temp. sensor, V
CC
/10, Bandgap
100 ksps
Symbol Parameter Condition Min Typ Max Units
Gain error 1 to 64 gain < ±1 %
Offset error < ±1 mV
Vrms Noise level at input 64x gain
VREF = Int. 1V 0.12
mV
VREF = Ext. 2V 0.06
Clock rate Same as ADC 1000 kHz
Symbol Parameter Condition Min Typ Max Units