Datasheet

929
32142D–06/2013
ATUC64/128/256L3/4U
TWIM and TWIS user interface registers. Please refer to the TWIM and TWIS sections for more
information.
Notes: 1. Standard mode: ; fast mode: .
2. A device must internally provide a hold time of at least 300 ns for TWD with reference to the falling edge of TWCK.
Notations:
C
b
= total capacitance of one bus line in pF
t
clkpb
= period of TWI peripheral bus clock
t
prescaled
= period of TWI internal prescaled clock (see chapters on TWIM and TWIS)
The maximum t
HD;DAT
has only to be met if the device does not stretch the LOW period (t
LOW-TWI
)
of TWCK.
Table 35-45. TWI-Bus Timing Requirements
Symbol Parameter Mode
Minimum Maximum
Uni
tRequirement Device Requirement Device
t
r
TWCK and TWD rise time
Standard
(
1)
- 1000
ns
Fast
(1)
20 + 0.1C
b
300
t
f
TWCK and TWD fall time
Standard - 300
ns
Fast 20 + 0.1C
b
300
t
HD-STA
(Repeated) START hold time
Standard 4
t
clkpb
- s
Fast 0.6
t
SU-STA
(Repeated) START set-up
time
Standard 4.7
t
clkpb
- s
Fast 0.6
t
SU-STO
STOP set-up time
Standard 4.0
4t
clkpb
- s
Fast 0.6
t
HD-DAT
Data hold time
Standard
0.3
(2)
2t
clkpb
3.45
()
15t
prescaled
+
t
clkpb
s
Fast 0.9
()
t
SU-DAT-
TWI
Data set-up time
Standard 250
2t
clkpb
-ns
Fast 100
t
SU-DAT
--t
clkpb
--
t
LOW-TWI
TWCK LOW period
Standard 4.7
4t
clkpb
- s
Fast 1.3
t
LOW
--t
clkpb
--
t
HIGH
TWCK HIGH period
Standard 4.0
8t
clkpb
- s
Fast 0.6
f
TWCK
TWCK frequency
Standard
-
100
kHz
Fast 400
1
12t
clkpb
------------------------
f
TWCK
100 kHz
f
TWCK
100 kHz