Datasheet

905
32142D–06/2013
ATUC64/128/256L3/4U
Note: 1. V
VDD
corresponds to either V
VDDIN
or V
VDDIO
, depending on the supply for the pin. Refer to Section on page 10 for details.
35.6 Oscillator Characteristics
35.6.1 Oscillator 0 (OSC0) Characteristics
35.6.1.1 Digital Clock Characteristics
The following table describes the characteristics for the oscillator when a digital clock is applied
on XIN.
Note: 1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
cess technology. These values are not covered by test limits in production.
35.6.1.2 Crystal Oscillator Characteristics
The following table describes the characteristics for the oscillator when a crystal is connected
between XIN and XOUT as shown in Figure 35-3. The user must choose a crystal oscillator
where the crystal load capacitance
C
L
is within the range given in the table. The exact value of C
L
V
OL
Output low-level voltage I
OL
= 3mA 0.4 V
I
LEAK
Input leakage current Pull-up resistors disabled 1
µAI
IL
Input low leakage 1
I
IH
Input high leakage 1
C
IN
Input capacitance
TQFP48 package 3.8
pF
QFN48 package 3.5
TLLGA48 package 3.5
TQFP64 package 3.9
QFN64 package 3.5
t
FALL
Fall time
Cbus = 400pF, V
VDD
> 2.0V 250
ns
Cbus = 400pF, V
VDD
> 1.62V 470
f
MAX
Max frequency Cbus = 400pF, V
VDD
> 2.0V 400 kHz
Table 35-9. TWI Pin Characteristics
(1)
Symbol Parameter Condition Min Typ Max Units
Table 35-10. Digital Clock Characteristics
Symbol Parameter Conditions Min Typ Max Units
f
CPXIN
XIN clock frequency 50 MHz
t
CPXIN
XIN clock duty cycle
(1)
40 60 %
t
STARTUP
Startup time 0 cycles
C
IN
XIN input capacitance
TQFP48 package 7.0
pF
QFN48 package 6.7
TLLGA48 package 6.7
TQFP64 package 7.1
QFN64 package 6.7