Datasheet

903
32142D–06/2013
ATUC64/128/256L3/4U
Notes: 1. V
VDD
corresponds to either V
VDDIN
or V
VDDIO
, depending on the supply for the pin. Refer to Section on page 10 for details.
Table 35-7. High-drive I/O Pin Characteristics
(1)
Symbol Parameter Condition Min Typ Max Units
R
PULLUP
Pull-up resistance
PA06 30 50 110
kOhmPA02, PB01, RESET 75 100 145
PA08, PA09 10 20 45
V
IL
Input low-level voltage
V
VDD
= 3.0V -0.3 0.3 * V
VDD
V
V
VDD
= 1.62V -0.3 0.3 * V
VDD
V
IH
Input high-level voltage
V
VDD
= 3.6V 0.7 * V
VDD
V
VDD
+ 0.3
V
V
VDD
= 1.98V 0.7 * V
VDD
V
VDD
+ 0.3
V
OL
Output low-level voltage
V
VDD
= 3.0V, I
OL
= 6mA 0.4
V
V
VDD
= 1.62V, I
OL
= 4mA 0.4
V
OH
Output high-level voltage
V
VDD
= 3.0V, I
OH
= 6mA V
VDD
- 0.4
V
V
VDD
= 1.62V, I
OH
= 4mA V
VDD
- 0.4
f
MAX
Output frequency, all High-drive I/O
pins, except PA08 and PA09
(2)
V
VDD
= 3.0V, load = 10pF 45
MHz
V
VDD
= 3.0V, load = 30pF 23
t
RISE
Rise time, all High-drive I/O pins, except
PA08 and PA09
(2)
V
VDD
= 3.0V, load = 10pF 4.7
ns
V
VDD
= 3.0V, load = 30pF 11.5
t
FALL
Fall time, all High-drive I/O pins, except
PA08 and PA09
(2)
V
VDD
= 3.0V, load = 10pF 4.8
V
VDD
= 3.0V, load = 30pF 12
f
MAX
Output frequency, PA08 and PA09
(2)
V
VDD
= 3.0V, load = 10pF 54
MHz
V
VDD
= 3.0V, load = 30pF 40
t
RISE
Rise time, PA08 and PA09
(2)
V
VDD
= 3.0V, load = 10pF 2.8
ns
V
VDD
= 3.0V, load = 30pF 4.9
t
FALL
Fall time, PA08 and PA09
(2)
V
VDD
= 3.0V, load = 10pF 2.4
V
VDD
= 3.0V, load = 30pF 4.6
I
LEAK
Input leakage current Pull-up resistors disabled 1 µA
C
IN
Input capacitance, all High-drive I/O
pins, except PA08 and PA09
TQFP48 package 2.2
pF
QFN48 package 2.0
TLLGA48 package 2.0
TQFP64 package 2.3
QFN64 package 2.0
C
IN
Input capacitance, PA08 and PA09
TQFP48 package 7.0
QFN48 package 6.7
TLLGA48 package 6.7
TQFP64 package 7.1
QFN64 package 6.7