Datasheet

902
32142D–06/2013
ATUC64/128/256L3/4U
35.5 I/O Pin Characteristics
Notes: 1. V
VDD
corresponds to either V
VDDIN
or V
VDDIO
, depending on the supply for the pin. Refer to Section on page 10 for details.
2. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
cess technology. These values are not covered by test limits in production.
Table 35-6. Normal I/O Pin Characteristics
(1)
Symbol Parameter Condition Min Typ Max Units
R
PULLUP
Pull-up resistance 75 100 145 kOhm
V
IL
Input low-level voltage
V
VDD
= 3.0V -0.3 0.3 * V
VDD
V
V
VDD
= 1.62V -0.3 0.3 * V
VDD
V
IH
Input high-level voltage
V
VDD
= 3.6V 0.7 * V
VDD
V
VDD
+ 0.3
V
V
VDD
= 1.98V 0.7 * V
VDD
V
VDD
+ 0.3
V
OL
Output low-level voltage
V
VDD
= 3.0V, I
OL
= 3mA 0.4
V
V
VDD
= 1.62V, I
OL
= 2mA 0.4
V
OH
Output high-level voltage
V
VDD
= 3.0V, I
OH
= 3mA V
VDD
- 0.4
V
V
VDD
= 1.62V, I
OH
= 2mA V
VDD
- 0.4
f
MAX
Output frequency
(2)
V
VDD
= 3.0V, load = 10pF 45
MHz
V
VDD
= 3.0V, load = 30pF 23
t
RISE
Rise time
(2)
V
VDD
= 3.0V, load = 10pF 4.7
ns
V
VDD
= 3.0V, load = 30pF 11.5
t
FALL
Fall time
(2)
V
VDD
= 3.0V, load = 10pF 4.8
V
VDD
= 3.0V, load = 30pF 12
I
LEAK
Input leakage current Pull-up resistors disabled 1 µA
C
IN
Input capacitance, all
normal I/O pins except
PA0 5 , PA0 7, PA1 7 , PA 20 ,
PA21, PB04, PB05
TQFP48 package 1.4
pF
QFN48 package 1.1
TLLGA48 package 1.1
TQFP64 package 1.5
QFN64 package 1.1
C
IN
Input capacitance, PA20
TQFP48 package 2.7
QFN48 package 2.4
TLLGA48 package 2.4
TQFP64 package 2.8
QFN64 package 2.4
C
IN
Input capacitance, PA05,
PA07, PA17, PA21, PB04,
PB05
TQFP48 package 3.8
QFN48 package 3.5
TLLGA48 package 3.5
TQFP64 package 3.9
QFN64 package 3.5