Datasheet

896
32142D–06/2013
ATUC64/128/256L3/4U
34.6.8.8 MEMORY_SPEED
Counts the number of RC120M clock cycles it takes to sync one message to the SAB interface
and back again. The SAB clock speed ( ) can be calculated using the following formula:
34.6.9 Security Restrictions
When the security fuse in the Flash is programmed, the following aWire commands are limited:
• MEMORY_WRITE
• MEMORY_READ
Unlimited access to these instructions is restored when the security fuse is erased by the
CHIP_ERASE aWire command.
Note that the security bit will read as programmed and block these instructions also if the Flash
Controller is statically reset.
Table 34-58. STATUS_INFO Details
Response Details
Response value 0xC4
Additional data 2 status bytes
Table 34-59. MEMORY_SPEED Details
Response Details
Response value 0xC5
Additional data Clock cycle count (MS)
f
sab
f
sab
3f
aw
CV 3–
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