Datasheet

833
32142D–06/2013
ATUC64/128/256L3/4U
This bit is set when the clock is disabled.
This bit is cleared when the clock is enabled.
BUSY: Synchronizer Busy
0: The asynchronous interface is ready to accept more data.
1: The asynchronous interface is busy and will block writes to CTRL, BRR, and THR.
This bit is set when the asynchronous interface becomes busy.
This bit is cleared when the asynchronous interface becomes ready.