Datasheet

82
32142D–06/2013
ATUC64/128/256L3/4U
•User interface
• USB Core
• Transceiver pads
Figure 8-1. USBC Block Diagram
Note: in the block diagram is symbolic, it is mapped to a GPIO pin (See Section “8.5.1” on page 84.).
The VBUS detection (rising edge detection on the GPIO pin) should be handled by software.
Interrupt
Controller
USB interrupts
DM
USB_VBUS
(1)
USB
DP
User interface
SCIF
GCLK_USBC @ 48 MHz
PB
USB 2.0
Core
USB clock
domain
System clock
domain
HSB
HSB Master