Datasheet

32142D–06/2013

ATUC64/128/256L3/4U

8. USB Interface (USBC)

Rev: 2.0.0.15

8.1 Features

• Compatible with the USB 2.0 specification

• Supports full (12Mbit/s) and low (1.5Mbit/s) speed communication

• Seven physical pipes/endpoints in ping-pong mode

• Flexible pipe/endpoint configuration and reallocation of data buffers in embedded RAM

• Up to two memory banks per pipe/endpoint

• Built-in DMA with multi-packet support through ping-pong mode

• On-chip transceivers with built-in pull-ups and pull-downs

8.2 Overview

The Universal Serial Bus interface (USBC) module complies with the Universal Serial Bus (USB)

2.0 specification.

Each pipe/endpoint can be configured into one of several transfer types. It can be associated

with one or more memory banks (located inside the embedded system or CPU RAM) used to

store the current data payload. If two banks are used (“ping-pong” mode), then one bank is read

or written by the CPU (or any other HSB master) while the other is read or written by the USBC

core.

Table 8-1 describes the hardware configuration of the USBC module.

8.3 Block Diagram

The USBC interfaces a USB link with a data flow stored in the embedded ram (CPU or HSB).

The USBC requires a 48MHz ± 0.25% reference clock, which is the USB generic clock. For

more details see ”Clocks” on page 84. The 48MHz clock is used to generate either a 12MHz full-

speed or a 1.5MHz low-speed bit clock from the received USB differential data, and to transmit

data according to full- or low-speed USB device tolerances. Clock recovery is achieved by a dig-

ital phase-locked loop (a DPLL, not represented) in the USBC module, which complies with the

USB jitter specifications.

The USBC module consists of:

• HSB master interface

Table 8-1. Description of USB pipes/endpoints

pipe/endpoint Mnemonic Max. size

Number of

available banks Type

0 PEP0 1023 bytes 1 Control/Isochronous/Bulk/Interrupt

1 PEP1 1023 bytes 2 Control/Isochronous/Bulk/Interrupt

2 PEP2 1023 bytes 2 Control/Isochronous/Bulk/Interrupt

... ... ... ... ...

6 PEP6 1023 bytes 2 Control/Isochronous/Bulk/Interrupt