Datasheet

771
32142D–06/2013
ATUC64/128/256L3/4U
31.3 Block Diagram
Figure 31-1. CAT Block Diagram
31.4 I/O Lines Description
Interface
Registers
Peripheral Bus
Finite State
Machine
Capacitor
Charge and
Discharge
Sequence
Generator
Counters
CSAn
SMP
I/O
Controller
Pins
Discharge
Current
Sources
DIS
Yn
Analog
Comparators
Peripheral
Event System
CLK_CAT
Analog
Comparator
Interface
SYNC
Capacitive Touch Module (CAT)
CSBn
GCLK_CAT
VDIVEN
NOTE:
Italicized
signals and
blocks are
used only for
QMatrix
operation
Table 31-1. I/O Lines Description
Name Description Type
CSAn Capacitive sense A line n I/O
CSBn Capacitive sense B line n I/O
DIS Discharge current control (only used for QMatrix) Analog