Datasheet

576
32142D–06/2013
ATUC64/128/256L3/4U
• SWRST: Software Reset
This bit will always read as 0.
Writing a zero to this bit has no effect.
Writing a one to this bit resets the TWIS.
• STREN: Clock Stretch Enable
0: Disables clock stretching if RHR/THR buffer full/empty. May cause over/underrun.
1: Enables clock stretching if RHR/THR buffer full/empty.
• GCMATCH: General Call Address Match
0: Causes the TWIS not to acknowledge the General Call Address.
1: Causes the TWIS to acknowledge the General Call Address.
• SMATCH: Slave Address Match
0: Causes the TWIS not to acknowledge the Slave Address.
1: Causes the TWIS to acknowledge the Slave Address.
• SMEN: SMBus Mode Enable
0: Disables SMBus mode.
1: Enables SMBus mode.
• SEN: Slave Enable
0: Disables the slave interface.
1: Enables the slave interface.