Datasheet

529
32142D–06/2013
ATUC64/128/256L3/4U
22.5 Application Block Diagram
Figure 22-2. Application Block Diagram
22.6 I/O Lines Description
22.7 Product Dependencies
In order to use this module, other parts of the system must be configured correctly, as described
below.
22.7.1 I/O Lines
TWD and TWCK are bidirectional lines, connected to a positive supply voltage via a current
source or pull-up resistor (see Figure 22-4 on page 531). When the bus is free, both lines are
high. The output stages of devices connected to the bus must have an open-drain or open-col-
lector to perform the wired-AND function.
TWALM is used to implement the optional SMBus SMBALERT signal.
The TWALM, TWD, and TWCK pins may be multiplexed with I/O Controller lines. To enable the
TWIM, the user must perform the following steps:
• Program the I/O Controller to:
– Dedicate TWD, TWCK, and optionally TWALM as peripheral lines.
– Define TWD, TWCK, and optionally TWALM as open-drain.
22.7.2 Power Management
If the CPU enters a sleep mode that disables clocks used by the TWIM, the TWIM will stop func-
tioning and resume operation after the system wakes up from sleep mode.
TWI
Master
TWD
TWCK
Atmel TWI
serial EEPROM
I
2
C RTC
I
2
C LCD
controller
I
2
C temp
sensor
Slave 2 Slave 3 Slave 4
VDD
Rp: pull-up value as given by the I2C Standard
TWALM
Slave 1
Rp Rp Rp
Table 22-4. I/O Lines Description
Pin Name Pin Description Type
TWD Two-wire Serial Data Input/Output
TWCK Two-wire Serial Clock Input/Output
TWALM SMBus SMBALERT Input/Output