Datasheet

451
32142D–06/2013
ATUC64/128/256L3/4U
Figure 20-22. Header Reception
20.6.5.7 Slave Node Synchronization
Synchronization is only done by the slave. If the Sync field is not 0x55, an Inconsistent Sync
Field error (CSR.LINISFE) is generated. The time between falling edges is measured by a 19-bit
counter, driven by the sampling clock (see Section 20.6.1).
Figure 20-23. Sync Field
The counter starts when the Sync field start bit is detected, and continues for eight bit periods.
The 16 most significant bits (counter value divided by 8) becomes the new clock divider
(BRGR.CD), and the three least significant bits (the remainder) becomes the new fractional part
(BRGR.FP).
Figure 20-24. Slave Node Synchronization
The synchronization accuracy depends on:
• The theoretical slave node clock frequency; nominal clock frequency (F
Nom
)
• The baud rate
Break Field
13 dominant bits (at 0)
Break
Delimiter
1 recessive bit
(at 1)
Start
Bit
10101010
Stop
Bit
Start
Bit
ID0 ID1 ID2 ID4ID3 ID6ID5 ID7
Stop
Bit
Synch Byte = 0x55
Baud Rate
Clock
RXD
Write US_CR
With RSTSTA=1
US_LINIR
LINID
Start
bit
Stop
bit
Synch Field
8 Tbit
2 Tbit 2 Tbit 2 Tbit 2 Tbit
RXD
Baud Rate
Clock
LINIDRX
Synchro Counter 000_0011_0001_0110_1101
BRGR
Clcok Divider (CD)
0000_0110_0010_1101
BRGR
Fractional Part (FP)
101
Initial CD
Initial FP
Reset
Start
Bit
10101010
Stop
Bit
Start
Bit
ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7Break Field
13 dominant bits (at 0)
Stop
Bit
Break
Delimiter
1 recessive bit
(at 1)
Synch Byte = 0x55