Datasheet

450
32142D–06/2013
ATUC64/128/256L3/4U
customizable response data lengths, and requires minimal CPU resources. Writing 0xA (master)
or 0xB (slave) to MR.MODE enables this mode.
20.6.5.1 Modes of operation
Changing LIN mode after initial configuration has to be followed by a transceiver software reset
in order to avoid unpredictable behavior.
20.6.5.2 Receiver and Transmitter Control
See Section “20.6.2” on page 439.
20.6.5.3 Baud Rate Configuration
The LIN nodes baud rate is configured in the Baud Rate Generator Register (BRGR), See Sec-
tion “20.6.1.1” on page 437.
20.6.5.4 Character Transmission and Reception
See ”Transmitter Operations” on page 440, and ”Receiver Operations” on page 442.
20.6.5.5 Header Transmission (Master Node Configuration)
All LIN frames start with a header sent by the master. As soon as the identifier has been written
to the Identifier Character field in the LIN Identifier Register (LINIR.IDCHR), TXRDY is cleared
and the header is sent. The header consists of a Break, Sync, and Identifier field. TXRDY is set
when the identifier has been transferred into the transmitters shift register.
The Break field consists of 13 dominant bits, the break, and one recessive bit, the break delim-
iter. The Sync field is the character 0x55. The Identifier field contains the Identifier as written to
IDCHR. The identifier parity bits can be generated automatically (see Section 20.6.5.8).
Figure 20-21. Header Transmission
20.6.5.6 Header Reception (Slave Node Configuration)
The USART stays idle until it detects a break field, consisting of at least 11 consecutive domi-
nant bits (zeroes) on the bus. A received break will set the Lin Break bit (CSR.LINBK). The Sync
field is used to synchronize the baud rate (see Section 20.6.5.7). IDCHR is updated and the LIN
Identifier bit (CSR.LINID) is set when the Identifier has been received. The Identifier parity bits
can be automatically checked (see Section 20.6.5.8). Writing a one to RSTSTA will clear LINBK
and LINID.
TXD
Baud Rate
Clock
Start
Bit
Write
LINIR
10101010
TXRDY
Stop
Bit
Start
Bit
ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7Break Field
13 dominant bits (at 0)
Stop
Bit
Break
Delimiter
1 recessive bit
(at 1)
Synch Byte = 0x55
LINIR
ID