Datasheet

278
32142D–06/2013
ATUC64/128/256L3/4U
14.6.10 DFLLn Configuration Register
Name:
DFLLnCONF
Access Type: Read/Write
Reset Value: 0x00000000
• COARSE: Coarse Calibration Value
Set the value of the coarse calibration register. If in closed loop mode, this field is Read-only.
• FINE: FINE Calibration Value
Set the value of the fine calibration register. If in closed loop mode, this field is Read-only.
• QLEN: Quick Lock Enable
0: Quick Lock is disabled.
1: Quick Lock is enabled.
• CCEN: Chill Cycle Enable
0: Chill Cycle is disabled.
1: Chill Cycle is enabled.
• LLAW: Lose Lock After Wake
0: Locks will not be lost after waking up from sleep modes.
1: Locks will be lost after waking up from sleep modes where the DFLL clock has been stopped.
• DITHER: Enable Dithering
0: The fine LSB input to the VCO is constant.
1: The fine LSB input to the VCO is dithered to achieve sub-LSB approximation to the correct multiplication ratio.
• MODE: Mode Selection
0: The DFLL is in open loop operation.
1: The DFLL is in closed loop operation.
• EN: Enable
0: The DFLL is disabled.
1: The DFLL is enabled.
Note that this register is protected by a lock. To write to this register the UNLOCK register has to be written first. Please
refer to the UNLOCK register description for details.
31 30 29 28 27 26 25 24
COARSE[7:0]
23 22 21 20 19 18 17 16
-------FINE[8]
15 14 13 12 11 10 9 8
FINE[7:0]
76543210
- QLEN CCEN - LLAW DITHER MODE EN