Datasheet

226

32142D–06/2013

ATUC64/128/256L3/4U

Note that this register is protected by a lock. To write to this register the UNLOCK register has to be written first. Please

refer to the UNLOCK register description for details.

12 - - USART3 -

13 - - SPI -

14 - - TWIM0 -

15 - - TWIM1 -

16 SYSTIMER - TWIS0 -

17 - - TWIS1 -

18 - - PWMA -

19 - - TC0 -

20 - - TC1 -

21 - - ADCIFB -

22 - - ACIFB -

23 - - CAT -

24 - - GLOC -

25 - - AW -

26 - - ABDACB -

27 - - IISC -

31:28----

Table 13-9. Maskable Module Clocks in ATUC64/128/256L3/4U.

Bit CPUMASK HSBMASK PBAMASK PBBMASK