Datasheet

719
32133D–11/2011
UC3D
Figure 32-1. Measurement Schematic, External Core Supply
32.5.1 Peripheral Power Consumption
The values in Table 32-5 are measured values of power consumption under the following
conditions.
Operating conditions external core supply (Figure 32-1)
–V
VDDIN
= 3.3V
–V
VDDCORE
= 1.8V, supplied by the internal regulator
Corresponds to the 3.3V + 1.8V dual supply mode , please refer to the Supply and
Startup Considerations section for more details
•T
A = 25°C
Oscillators
OSC0 on external clock running
PLL running at 48MHz with OSC0 as reference
Clocks
OSC0 external clock used as main clock source
CPU, HSB, and PB clocks undivided
Internal
Voltage
Regulator
Amp0
Amp1
VDDANA
VDDIO
VDDIN
VDDOUT
VDDCORE