Datasheet

626
32133D–11/2011
UC3D
28.7.9 Timing Configuration Register
Name :
TIM
Access Type : Read/Write
Offset : 0x20
Reset Value : 0x00000000
SHTIM: Sample and hold time
Sample and hold time in number of GCLK clock cycles : SHTIM+1
STARTUP: Startup time
Number of GCLK clock cycles to wait for : (STARTUP+1)*8
31 30 29 28 27 26 25 24
--------
23 22 21 20 19 18 17 16
---- SHTIM
15 14 13 12 11 10 9 8
--------
76543210
- - - STARTUP