Datasheet

580
32133D–11/2011
UC3D
27.7.3 Pin Mode Registers 0, 1, and 2
Name:
PINMODE0, PINMODE1, and PINMODE2
Access Type: Read/Write
Offset: 0x08, 0x0C, 0x74
Reset Value: 0x00000000
• SP: Sense Pair Mode Selection
Each SP[n] bit determines the operation mode of sense pair n (CSAn and CSBn pins). The (PINMODE2.SP[n]
PINMODE1.SP[n] PINMODE0.SP[n]) bits have the following definitions:
000: Sense pair n disabled.
001: Sense pair n is assigned to QTouch Group A.
010: Sense pair n is assigned to QTouch Group B.
011:Reserved.
100: Sense pair n is assigned to the DMATouch Group.
101: Reserved.
110: Reserved.
111: Reserved.
31 30 29 28 27 26 25 24
-
23 22 21 20 19 18 17 16
- SP[16]
15 14 13 12 11 10 9 8
SP[15:8]
76543210
SP[7:0]