Datasheet

576
32133D–11/2011
UC3D
9, 3, 4, 5, 6, 7, 8, 9, 3, 4, etc. MAXDEV must not exceed the value of (2(DIV+1)), or undefined
behavior will occur.
27.6.6 Synchronization
To prevent interference from the 50 or 60 Hz mains line the CAT can trigger acquisition on the
SYNC signal. The SYNC signal should be derived from the mains line. The acquisition will trig-
ger on a falling edge of this signal. To enable synchronization for a specific acquisition type, the
user must write a one to the SYNC bit in the appropriate Configuration Register 1 ( ATCFG1,
TGACFG1, or TGBCFG1).
27.6.7 Resistive Drive
By default, the CAT pins are driven with normal I/O drive properties. Some of the CSA and CSB
pins can optionally drive with a 1k output resistance for improved EMC. The pins that have this
capability are listed in the Module Configuration section.