Datasheet

573
32133D–11/2011
UC3D
the Control Register (CTRL). After the module is enabled, the module will acquire data from the
autonomous QTouch sensor and use it to determine whether the sensor is activated. The
active/inactive status of the autonomous QTouch sensor is reported in the Status Register (SR),
and it is also possible to configure the CAT to generate an interrupt whenever the status
changes. The module will continue acquiring autonomous QTouch sensor data and updating
autonomous QTouch status until the module is disabled or reset.
In order to use the DMATouch capability, it is first necessary to set up the pin mode registers
(PINMODE0, PINMODE1, and PINMODE2) so that the desired pins are specified as DMA-
Touch. The Autonomous/DMA Touch Configuration Registers (ATCFG0 through 3) must also be
configured with appropriate values. One channel of the Peripheral DMA Controller must be set
up to transfer state words from a block of memory to the DMATSW register, and another chan-
nel must be set up to transfer state words from the DMATSR register back to the same block of
memory. The module can then be enabled using the CTRL register. After the module is enabled,
the module will acquire count values from each DMATouch sensor. Once the module has
acquired a count value for a sensor, it will use a handshake interface to signal the Peripheral
DMA controller to transfer a state word to the DMATSW register. The module will use the count
value to update the state word, and then the updated state word will be transferred to the
DMATSR register. Another handshake interface will signal the Peripheral DMA controller to
transfer the contents of the DMATSR register back to memory. The status of the DMATouch
sensors can be determined at any time by reading the DMATouch Sensor Status Register
(DMATSS).
In order to use the QTouch group A, or QTouch group B acquisition capabilities, it is first neces-
sary to set up the pin mode registers (PINMODE0, PINMODE1, and PINMODE2) and
configuration registers (TGACFG0, TGACFG1, TGBCFG0, and TGBCFG1). The module must
then be enabled using the CTRL register. In order to initiate acquisition, it is necessary to per-
form a write to the Acquisition Initiation and Selection Register (AISR). The specific value written
to AISR determines which type of acquisition will be performed: QTouch group A, or QTouch
group B. The CPU can initiate acquisition by writing to the AISR.
While QTouch group A, or QTouch group B acquisition is in progress, the module collects count
values from the sensors and buffers them. Availability of acquired count data is indicated by the
Acquisition Ready (ACREADY) bit in the Status Register (SR). The CPU or the Peripheral DMA
Controller can then read the acquired counts from the ACOUNT register.
Because the CAT module is configured with Peripheral DMA Controller capability that can trans-
fer data from ACOUNT to memory, the Peripheral DMA Controller can perform long acquisition
sequences and store results in memory without CPU intervention.
27.6.2 Prescaler and Charge Length
Each QTouch acquisition type (autonomous QTouch, QTouch group A, and QTouch group B)
has its own prescaler. Each QTouch prescaler divides down the CLK_CAT clock to an appropri-
ate sampling frequency for its particular acquisition type. Typical frequencies are 1MHz for
QTouch acquisition.
Each QTouch prescaler is controlled by the DIV field in the appropriate Configuration Register 0
(ATCFG0, TGACFG0, or TGBCFG0). Each prescaler uses the following formula to generate the
sampling clock:
Sampling clock = CLK_CAT / (2(DIV+1))