Datasheet

535
32133D–11/2011
UC3D
Figure 26-4. Capture Mode
TIMER_CLOCK1
XC0 XC1 XC2
TCCLKS
CLKI
QS
R
S
R
Q
CLKSTA CLKEN
CLKDIS
BURST
TIOB
Capture
Register A
Compare RC =
16-bit
Counter
ABETRG
SWTRG
ETRGEDG
CPCTRG
IMR
Trig
LDRBS
LDRAS
ETRGS
SR
LOVRS
COVFS
SYNC
1
MTIOB
TIOA
MTIOA
LDRA
LDBSTOP
If RA is not Loaded
or RB is Loaded
If RA is Loaded
LDBDIS
CPCS
INT
Edge
Det ect or
LDRB
CLK
OVF
RESET
Timer/Counter Channel
Edge
Detector
Edge
Detector
Capture
Register B
Register C
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5