Datasheet

526
32133D–11/2011
UC3D
25.7.15 Interlinked Multiple Value Duty0/1/2/3 Register
Name:
DUTY0/1/2/3
Access Type: Write-only
Offset: 0x80-0x8C
Reset Value: 0x00000000
These registers allows up to 4 channels to be updated with a common 12-bits duty cycle value at a time. They are the
extension of the IMDUTY register which only supports updating the least significant 8 bits of the duty registers for up to 4
channels.
• DUTY: Duty Cycle Value
The duty cycle value written to this field will be updated to the channel specified by IMCHSEL.
DUTY0 is specified by IMCHSEL.SEL0, DUTY1 is specified by IMCHSEL.SEL1, and so on.
31 30 29 28 27 26 25 24
--------
23 22 21 20 19 18 17 16
--------
15 14 13 12 11 10 9 8
---- DUTY[11:8]
76543210
DUTY[7:0]