Datasheet

483
32133D–11/2011
UC3D
Figure 24-10. Slave Receiver with One Data Byte
Figure 24-11. Slave Receiver with Multiple Data Bytes
24.8.5 Interactive ACKing Received Data Bytes
When implementing a register interface over TWI, it may sometimes be necessary or just useful
to report reads and writes to invalid register addresses by sending a NAK to the host. To be able
to do this, one must first receive the register address from the TWI bus, and then tell the TWIS
whether to ACK or NAK it. In normal operation of the TWIS, this is not possible because the con-
troller will automatically ACK the byte at about the same time as the RXRDY bit changes from
zero to one. Writing a one to the Stretch on Data Byte Received bit (CR.SODR) will stretch the
clock allowing the user to update CR.ACK bit before returning the desired value. After the last bit
in the data byte is received, the TWI bus clock is stretched, the received data byte is transferred
to the RHR register, and SR.BTF is set. At this time, the user can examine the received byte and
write the desired ACK or NACK value to CR.ACK. When the user clears SR.BTF, the desired
ACK value is transferred on the TWI bus. This makes it possible to look at the byte received,
determine if it is valid, and then decide to ACK or NAK it.
24.8.6 Using the Peripheral DMA Controller
The use of the Peripheral DMA Controller significantly reduces the CPU load. The user can set
up ring buffers for the Peripheral DMA Controller, containing data to transmit or free buffer space
to place received data. By initializing NBYTES to zero before a transfer, and writing a one to
CR.CUP, NBYTES is incremented by one each time a data has been transmitted or received.
This allows the user to detect how much data was actually transferred by the DMA system.
To assure correct behavior, respect the following programming sequences:
24.8.6.1 Data Transmit with the Peripheral DMA Controller
1. Initialize the transmit Peripheral DMA Controller (memory pointers, size, etc.).
2. Configure the TWIS (ADR, NBYTES, etc.).
ASDADRW DATA AP
TCOMP
RX RDY
Read RHR
TWD
A
ASDADRW DATA nA ADATA (n+1) A DATA (n+m)DATA (n+m)-1 PTWD
TC O M P
RX RDY
Read RHR
DATA n
Read RHR
DATA ( n+1)
Read RHR
DAT A (n+m)-1
Read RHR
DATA (n+m)