Datasheet

476
32133D–11/2011
UC3D
Figure 24-2. Application Block Diagram
24.6 I/O Lines Description
24.7 Product Dependencies
In order to use this module, other parts of the system must be configured correctly, as described
below.
24.7.1 I/O Lines
TWDand TWCK are bidirectional lines, connected to a positive supply voltage via a current
source or pull-up resistor (see Figure 24-5 on page 478). When the bus is free, both lines are
high. The output stages of devices connected to the bus must have an open-drain or open-col-
lector to perform the wired-AND function.
TWD and TWCK pins may be multiplexed with I/O Controller lines. To enable the TWIS, the user
must perform the following steps:
• Program the I/O Controller to:
– Dedicate TWD, TWCKas peripheral lines.
– Define TWD, TWCKas open-drain.
24.7.2 Power Management
If the CPU enters a sleep mode that disables clocks used by the TWIS, the TWIS will stop func-
tioning and resume operation after the system wakes up from sleep mode. The TWIS is able to
wake the system from sleep mode upon address match, see Section 24.8.8 on page 485.
Host with
TWI
Interface
TWD
TWCK
Atmel TWI
serial EEPROM
I²C RTC
I²C LCD
controller
Slave 1 Slave 2 Slave 3
VDD
I²C temp.
sensor
Slave 4
Rp: Pull up value as given by the I²C Standard
Rp Rp
Table 24-4. I/O Lines Description
Pin Name Pin Description Type
TWD Two-wire Serial Data Input/Output
TWCK Two-wire Serial Clock Input/Output