Datasheet

47
32133D–11/2011
UC3D
8.8 User Interface
Note: 1. The value of the Lock bits depend on their programmed state. All other bits in FSR are 0.
2. All bits in FGPRHI/LO are dependent on the programmed state of the fuses they map to. Any bits in these registers not
mapped to a fuse read as 0.
3. The reset values for these registers are device specific. Please refer to the Module Configuration section at the end of this
chapter.
Table 8-5. FLASHCDW Register Memory Map
Offset Register Register Name Access Reset
0x00 Flash Control Register FCR Read/Write 0x00000000
0x04 Flash Command Register FCMD Read/Write 0x00000000
0x08 Flash Status Register FSR Read-only -
(1)
0x0C Flash Parameter Register FPR Read-only -
(3)
0x10 Flash Version Register FVR Read-only -
(3)
0x14 Flash General Purpose Fuse Register Hi FGPFRHI Read-only -
(2)
0x18 Flash General Purpose Fuse Register Lo FGPFRLO Read-only -
(2)