Datasheet

357
32133D–11/2011
UC3D
STTBRK: Start Break
Writing a zero to this bit has no effect.
Writing a one to this bit will start transmission of break characters when current characters present in THR and the transmit shift
register have been sent. No effect if a break signal is already being generated.
RSTSTA: Reset Status Bits
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the following bits in CSR: PARE, FRAME, OVRE, and RXBRK.
TXDIS: Transmitter Disable
Writing a zero to this bit has no effect.
Writing a one to this bit disables the transmitter.
TXEN: Transmitter Enable
Writing a zero to this bit has no effect.
Writing a one to this bit enables the transmitter if TXDIS is zero.
RXDIS: Receiver Disable
Writing a zero to this bit has no effect.
Writing a one to this bit disables the receiver.
RXEN: Receiver Enable
Writing a zero to this bit has no effect.
Writing a one to this bit enables the receiver if RXDIS is zero.
RSTTX: Reset Transmitter
Writing a zero to this bit has no effect.
Writing a one to this bit will reset the transmitter.
RSTRX: Reset Receiver
Writing a zero to this bit has no effect.
Writing a one to this bit will reset the receiver.