Datasheet

320
32133D–11/2011
UC3D
19.7.2.5 Device Global Interrupt Enable Register
Register Name: UDINTE
Access Type: Read-Only
Offset: 0x0010
Reset Value: 0x00000000
Note: 1. EPnINTE bits are within the range from EP0INTE to EP6INTE.
0: The corresponding interrupt is disabled.
1: The corresponding interrupt is enabled.
A bit in this register is cleared when the corresponding bit in UDINTECLR is written to one.
A bit in this register is set when the corresponding bit in UDINTESET is written to one.
31 30 29 28 27 26 25 24
--------
23 22 21 20 19 18 17 16
- - - EP8INTE
(1)
EP7INTE
(1)
EP6INTE
(1)
EP5INTE
(1)
EP4INTE
(1)
15 14 13 12 11 10 9 8
EP3INTE
(1)
EP2INTE
(1)
EP1INTE
(1)
EP0INTE----
76543210
- UPRSME EORSME WAKEUPE EORSTE SOFE - SUSPE