Datasheet

282
32133D–11/2011
UC3D
18.8 Module Configuration
The specific configuration for each GPIO instance is listed in the following tables. The module
bus clocks listed here are connected to the system bus clocks. Refer to the Power Manager
chapter for details.
The reset values for all GPIO registers are zero, with the following exceptions:
Table 18-3. Module Configuration
Feature GPIO
Number of GPIO ports 2
Number of peripheral functions 4
Table 18-4. Implemented Pin Functions
Pin Function Implemented Notes
Pull-up On all pins Controlled by PUER or peripheral
Glitch Filter No
Table 18-5. Module Clock Name
Module Name Clock Name
GPIO CLK_GPIO
Table 18-6. Register Reset Values
Port Register Reset Value
0 GPER 0xFFFFFFFF
0 PUER 0x00000000
0 PARAMETER 0xFFFFFFFF
0 VERSION 0x00000212
1 GPER 0x0007FFFF
1 PUER 0x00001000
1 PARAMETER 0x0007FFFF
1 VERSION 0x00000212