Datasheet

249
32133D–11/2011
UC3D
17.6.8 Interrupt Status Register
Name: ISR
Access Type: Read-only
Offset: 0x01C
Reset Value: 0x00000000
0: The corresponding interrupt is cleared.
1: The corresponding interrupt is pending.
A bit in this register is set when the corresponding bit in STATUS has a one to zero transition.
A bit in this register is cleared when the corresponding bit in ICR is written to one.
31 30 29 28 27 26 25 24
--------
23 22 21 20 19 18 17 16
--------
15 14 13 12 11 10 9 8
--------
76543210
- - - - - - RCLKRDY DONE