Datasheet

142
32133D–11/2011
UC3D
13.5.5 Brown Out Detection (BOD)
The Brown-Out Detector (BOD) monitors the internal voltage regulator output and compares the
voltage to the brown-out detection level, as set in BOD.LEVEL. The BOD is disabled by default,
but can be enabled either by software or by flash fuses. The Brown-Out Detector can either gen-
erate an interrupt or a reset when the supply voltage is below the brown-out detection level. In
any case, the BOD output is available in bit PCLKSR.BODET bit.
Note that any change to the BOD.LEVEL field of the BOD register should be done with the BOD
deactivated to avoid spurious reset or interrupt. When turned-on, the BOD output will be masked
during one half of a RCSYS clock cycle and two main clocks cycles to avoid false results
See Electrical Characteristics for parametric details.
Although it is not recommended to override default factory settings, it is still possible to override
these default values by writing to those registers. To prevent unexpected writes due to software
bugs, write access to this register is protected by a locking mechanism, for details please refer to
the UNLOCK register description.
13.5.6 Bandgap
The Flash memory, the Brown-Out Detector (BOD) and the temperature sensor need a stable
voltage reference to operate. This reference voltage is provided by an internal Bandgap voltage
reference. This reference is automatically turned on at startup and turned off during DEEPSTOP
and STATIC sleep modes to save power.
The Bandgap voltage reference is calibrated through the BGCR.CALIB field. This field is loaded
after a Power On Reset with default values stored in factory-programmed flash fuses.
It is not recommended to override default factory settings as it may prevent correct operation of
the Flash and BOD. To prevent unexpected writes due to software bugs, write access to this
register is protected by a locking mechanism, for details please refer to the UNLOCK register
description
13.5.7 Voltage Regulator (VREG)
The embedded voltage regulator can be used to provide the internal logic voltage from the
VDDIN. It is controlled by the VREGCR register. The voltage regulator is turned off by default at
startup and automatically turned on if an external 3.3V power is provided on the VDDIN.
The voltage regulator has its own voltage reference that is calibrated through the
VREGCR.CALIB field. This field is loaded after a Power On Reset with default values stored in
factory-programmed flash fuses.
3 USB clock (48 MHz)
4PWMA
5IISC
6AST
7-
8ADCIFD
Table 13-2. Generic clock allocation
Clock number Function