Datasheet

137
32133D–11/2011
UC3D
13. System Control Interface (SCIF)
Rev: 1.0.2.0
13.1 Features
• Controls integrated oscillators and Phase Locked Loops (PLLs)
• Supports crystal oscillator 0.4-20MHz (OSC0)
• Supports two Phase Locked Loop 80-240MHz (PLL)
• Supports 32KHz oscillator (OSC32K)
• Integrated 115 KHz RC oscillator (RCSYS)
• Generic clocks (GCLK) with wide frequency range provided
• Controls bandgap voltage reference through control and calibration registers
• Controls Brown-out detector (BOD)
• Controls Voltage Regulator (VREG) behavior and calibration
• Controls 120MHz integrated RC Oscillator (RC120M)
13.2 Overview
The System Control Interface (SCIF) controls the Oscillators, PLLs, Generic Clocks, BODs, and
Voltage Regulator.
13.3 I/O Lines Description
13.4 Product Dependencies
In order to use this module, other parts of the system must be configured correctly, as described
below.
13.4.1 I/O Lines
The SCIF provides a number of generic clock outputs, which can be connected to output pins,
multiplexed with GPIO lines. The programmer must first program the GPIO controller to assign
these pins to their peripheral function. If the I/O pins of the SCIF are not used by the application,
they can be used for other purposes by the GPIO controller. Oscillator pins are also multiplexed
with GPIO. When oscillators are used, the related pins are controlled directly by the SCIF, over-
riding GPIO settings.
13.4.2 Interrupt
The SCIF interrupt request line is connected to the interrupt controller. Using the SCIF interrupt
requires the interrupt controller to be programmed first.
Table 13-1. I/O Lines Description
Pin Name Pin Description Type
XIN0 Crystal 0 Input Analog/Digital
XIN32 Crystal 32 Input (primary location) Analog/Digital
XOUT0 Crystal 0 Output Analog
XOUT32 Crystal 32 Output (primary location) Analog
GCLK2-GCLK0 Generic Clock Output Output