Datasheet

131
32133D–11/2011
UC3D
12.7.16 Reset Cause
Name: RCAUSE
Access Type: Read-only
Offset: 0x180
Reset Value: Latest Reset Source
• AWIRE: AWIRE reset
The CPU was reset by tthe AWIRE
• OCDRST: OCD Reset
The CPU was reset because the RES strobe in the OCD Development Control register has been written to one.
•JTAG: JTAG reset
The CPU was reset by the JTAG system reset.
• SLEEP:
The CPU was reset because it went to SHUTDOWN or STATIC sleep mode.
• CPUERR: CPU Error
The CPU was reset because it had detected an illegal access.
• WDT: Watchdog Reset
The CPU was reset because of a watchdog time-out.
• EXT: External Reset Pin
The CPU was reset due to the RESET pin being asserted.
• BOD: Brown-out Reset
The CPU was reset due to the core supply voltage being lower than the brown-out threshold level.
• POR Power-on Reset
The CPU was reset due to the core supply voltage being lower than the power-on threshold level.
31 30 29 28 27 26 25 24
--------
23 22 21 20 19 18 17 16
--------
15 14 13 12 11 10 9 8
----AWIRE -OCDRST
76543210
CPUERR SLEEP - JTAG WDT EXT BOD POR