Datasheet

121
32133D–11/2011
UC3D
12.7.6 Divided Clock Mask
Name: PBADIVMASK
Access Type: Read/Write
Offset: 0x040
Reset Value: 0x0000007F
• MASK: Clock Mask
If bit n is written to zero, the clock divided by 2
(n+1)
is stopped. If bit n is written to one, the clock divided by 2
(n+1)
is enabled
according to the current power mode.
Note that this register is protected by a lock. To write to this register the UNLOCK register has to be written first. Please ref-
ere to the UNLOCK register description for details.
31 30 29 28 27 26 25 24
--------
23 22 21 20 19 18 17 16
- ------
15 14 13 12 11 10 9 8
--------
76543210
- MASK[6:0]