Datasheet

32133D–11/2011

UC3D

Note: 1. This bit must be one if the user wishes to debug the device with a JTAG debugger.

Note that this register is protected by a lock. To write to this register the UNLOCK register has to be written first. Please ref-

ere to the UNLOCK register description for details.

12 - - TWIS -

13 - - PWMA -

14 - - IISC -

15 - - TC -

SYSTIMER

(COMPARE/COUNT

REGISTERS CLK)

- ADCIFD -

17 - - SCIF -

18 - - FREQM -

19 - - CAT -

20 - - GLOC -

21 - - AW -

22----

23----

24----

25----

31:25----

Table 12-7. Maskable Module Clocks in UC3D.

Bit CPUMASK HSBMASK PBAMASK PBBMASK