Datasheet

115
32133D–11/2011
UC3D
12.7.1 Main Clock Control
Name: MCCTRL
Access Type: Read/Write
Offset: 0x000
Reset Value: 0x00000000
• MCSEL: Main Clock Select
Note: 1. If the 120MHz RC oscillator is selected as main clock source, it must be divided by at least 4 before being used as clock
source for the CPU. This division is selected by writing to the CPUSEL and CPUDIV bits in the CPUSEL register, before
switching to RC120M as main clock source.
Note that this register is protected by a lock. To write to this register the UNLOCK register has to be written first. Please ref-
ere to the UNLOCK register description for details.
31 30 29 28 27 26 25 24
--------
23 22 21 20 19 18 17 16
--------
15 14 13 12 11 10 9 8
--------
76543210
----- MCSEL
Table 12-6. Main clocks in .
MCSEL[2:0] Main clock source
0 System RC oscillator (RCSYS)
1 Oscillator0 (OSC0)
2 PLL0
3 PLL1
4 RC120
(1)
others reserved