Datasheet

19
8265CS–AVR–03/12
ATtiny87
; Select watchdog clock ( 128KHz, fast rising power)
ldi temp3,((0x03<<CSEL0)|(0x02<<CSUT0))
sts CLKSELR, temp3 ; (*)
; (*) !!! Loose gain control of crystal oscillator !!!
; ==> WORKAROUND ...
sts CLKSELR, temp1
; ...
3. ‘Disable Clock Source’ command remains enabled.
In the Dynamic Clock Switch module, the ‘Disable Clock Source’ command remains running
after disabling the targeted clock source (the clock source is set in the CLKSELR register).
Problem fix / workaround.
After a ‘Disable Clock Source’ command, reset the CLKCSR register writing 0x80.
Code example:
; Select crystal oscillator
ldi temp1,(0x0F<<CSEL0)
sts CLKSELR, temp1
; Disable clock source (crystal oscillator)
ldi temp2,(1<<CLKCCE)
ldi temp3,(0x01<<CLKC0) ; CSEL = "0001"
sts CLKCSR,temp2 ; Enable CLKCSR register access
sts CLKCSR,temp3 ; (*) Disable crystal oscillator clock
; (*) !!! At this moment, if any other clock source is selected by CLKSELR,
; this clock source will also stop !!!
; ==> WORKAROUND ...
sts CLKCSR,temp2