Datasheet

18
8265CS–AVR–03/12
ATtiny87
6. Errata
6.1 Errata ATtiny87
The revision letter in this section refers to the revision of the ATtiny87 device.
6.1.1 Rev. C
• Gain control of the crystal oscillator.
•‘Disable Clock Source’ command remains enabled.
6.1.2 Rev. A - B
Not sampled.
6.2 Errata ATtiny167
The revision letter in this section refers to the revision of the ATtiny167 device.
6.2.1 Rev. C
• Gain control of the crystal oscillator.
•‘Disable Clock Source’ command remains enabled.
6.2.2 Rev. A - B
Not sampled.
6.3 Errata Description
1. Gain control of the crystal oscillator.
The crystal oscillator (0.4 -> 16 MHz) doesn’t latch its gain control (CKSEL/CSEL[2:0] bits):
a. The ‘Recover System Clock Source’ command doesn’t returns CSEL[2:0] bits.
b. The gain control can be modified on the fly if CLKSELR changes.
Problem fix / workaround .
a. No workaround.
b. As soon as possible, after any CLKSELR modification, re-write the appropriate crystal
oscillator setting (CSEL[3]=1 and CSEL[2:0] / CSUT[1:0] bits) in CLKSELR.
Code example:
; Select crystal oscillator ( 16MHz crystal, fast rising power)
ldi temp1,((0x0F<<CSEL0)|(0x02<<CSUT0))
sts CLKSELR, temp1
; Enable clock source (crystal oscillator)
ldi temp2,(1<<CLKCCE)
ldi temp3,(0x02<<CLKC0) ; CSEL = "0010"
sts CLKCSR,temp2 ; Enable CLKCSR register access
sts CLKCSR,temp3 ; Enable crystal oscillator clock
; Clock source switch
ldi temp3,(0x04<<CLKC0) ; CSEL = "0100"
sts CLKCSR,temp2 ; Enable CLKCSR register access
sts CLKCSR,temp3 ; Clock source switch