Datasheet

i
8183F–AVR–06/12
ATtiny24A/44A/84A
Table of Contents
Features..................................................................................................... 1
1 Pin Configurations ................................................................................... 2
1.1 Pin Descriptions .................................................................................................3
2 Overview ................................................................................................... 4
3 General Information ................................................................................. 6
3.1 Resources .........................................................................................................6
3.2 Code Examples .................................................................................................6
3.3 Capacitive Touch Sensing .................................................................................6
3.4 Data Retention ...................................................................................................6
3.5 Disclaimer ..........................................................................................................6
4CPU Core .................................................................................................. 7
4.1 Architectural Overview .......................................................................................7
4.2 ALU – Arithmetic Logic Unit ...............................................................................8
4.3 Status Register ..................................................................................................8
4.4 General Purpose Register File ..........................................................................9
4.5 Stack Pointer ...................................................................................................10
4.6 Instruction Execution Timing ...........................................................................10
4.7 Reset and Interrupt Handling ...........................................................................11
4.8 Register Description ........................................................................................13
5 Memories ................................................................................................ 15
5.1 In-System Re-programmable Flash Program Memory ....................................15
5.2 SRAM Data Memory ........................................................................................15
5.3 EEPROM Data Memory ..................................................................................16
5.4 I/O Memory ......................................................................................................20
5.5 Register Description ........................................................................................20
6 Clock System ......................................................................................... 24
6.1 Clock Subsystems ...........................................................................................24
6.2 Clock Sources .................................................................................................25
6.3 System Clock Prescaler ..................................................................................30
6.4 Clock Output Buffer .........................................................................................30
6.5 Register Description ........................................................................................31
7 Power Management and Sleep Modes ................................................. 33