Datasheet

146
8183F–AVR–06/12
ATtiny24A/44A/84A
For offset calibration purpose the offset of the certain differential channels can be measure by
selecting the same input for both negative and positive input. This calibration can be done for
ADC0, ADC3 and ADC7.
“Operation” on page 133 describes offset calibration in a more detailed
level.
16.13.2 ADCSRA – ADC Control and Status Register A
• Bit 7 – ADEN: ADC Enable
Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning the
ADC off while a conversion is in progress, will terminate this conversion.
ADC2 (PA2)
ADC1 (PA1) 101100 101101
ADC3 (PA3) 010000 010001
ADC3 (PA3)
ADC0 (PA0) 101010 101011
ADC1 (PA1) 101110 101111
ADC2 (PA2) 110000 110001
ADC3 (PA3)
(1)
100100 100101
ADC4 (PA4 010010 010011
ADC5 (PA5) 010100 010101
ADC6 (PA6) 010110 010111
ADC7 (PA7) 011000 011001
ADC4 (PA4)
ADC3 (PA3) 110010 110011
ADC5 (PA5) 011010 011011
ADC5 (PA5)
ADC3 (PA3) 110100 110101
ADC4 (PA4) 111010 111011
ADC6 (PA6) 011100 011101
ADC6 (PA6)
ADC3 (PA3) 110110 110111
ADC5 (PA5) 111100 111101
ADC7 (PA7) 011110 011111
ADC7 (PA7)
ADC3 (PA3) 111000 111001
ADC6 (PA6) 111110 111111
ADC7 (PA7)
(1)
100110 100111
1. For offset calibration, only. See “Operation” on page 133.
Table 16-5. Differential Input channel Selections. (Continued)
Positive Differential Input Negative Differential Input
MUX[5:0]
Gain 1x Gain 20x
Bit 76543210
0x06 (0x26) ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0 ADCSRA
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000