Datasheet

128
8183F–AVR–06/12
ATtiny24A/44A/84A
15. Analog Comparator
The analog comparator compares the input values on the positive pin AIN0 and negative pin
AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on the negative pin
AIN1, the Analog Comparator Output, ACO, is set. The comparator can trigger a separate inter-
rupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on comparator
output rise, fall or toggle. A block diagram of the comparator and its surrounding logic is shown
in Figure 15-1.
Figure 15-1. Analog Comparator Block Diagram
Notes: 1. See Table 15-1 on page 129.
See Figure 1-1 on page 2 and Table 10-9 on page 66 for Analog Comparator pin placement.
The ADC Power Reduction bit, PRADC, must be disabled in order to use the ADC input multi-
plexer. This is done by clearing the PRADC bit in the Power Reduction Register, PRR. See
“PRR – Power Reduction Register” on page 37 for more details.
15.1 Analog Comparator Multiplexed Input
When the Analog to Digital Converter (ADC) is configurated as single ended input channel, it is
possible to select any of the ADC[7:0] pins to replace the negative input to the Analog Compara-
tor. The ADC multiplexer is used to select this input, and consequently, the ADC must be
switched off to utilize this feature. If the Analog Comparator Multiplexer Enable bit (ACME in
ADCSRB) is set and the ADC is switched off (ADEN in ADCSRA is zero), MUX[1:0] in ADMUX
select the input pin to replace the negative input to the analog comparator, as shown in Table
ACBG
BANDGAP
REFERENCE
ADC MULTIPLEXER
OUTPUT
ACME
ADEN
(1)
ACIC
To T/C1 Capture
Trigger MUX