Datasheet

93
7701F–AVR–10/12
Atmel ATtiny24/44/84 [Preliminary]
The double buffered output compare registers (OCR1A/B) are compared with the timer/coun-
ter value at all times. The result of the compare can be used by the waveform generator to
generate a PWM or variable frequency output on the output compare pin (OC1A/B). See “Out-
put Compare Units” on page 100. The compare match event will also set the compare match
flag (OCF1A/B) which can be used to generate an output compare interrupt request.
The input capture register can capture the timer/counter value at a given external (edge-trig-
gered) event on either the input capture pin (ICP1) or on the analog comparator pins (see
“Analog Comparator” on page 134). The input capture unit includes a digital filtering unit (noise
canceller) for reducing the chance of capturing noise spikes.
The top value, or maximum timer/counter value, can in some modes of operation be defined
by either the OCR1A register, the ICR1 register, or by a set of fixed values. When using
OCR1A as top value in a PWM mode, the OCR1A register cannot be used for generating a
PWM output. However, the top value will in this case be double buffered, allowing the top
value to be changed at run time. If a fixed top value is required, the ICR1 register can be used
as an alternative, freeing the OCR1A to be used as PWM output.
14.2.2 Definitions
The following definitions are used extensively throughout the section:
14.2.3 Compatibility
The 16-bit Timer/Counter has been updated and improved from previous versions of the 16-bit
Atmel
®
AVR
®
Timer/Counter. This 16-bit Timer/Counter is fully compatible with the earlier ver-
sion regarding:
• All 16-bit Timer/Counter related I/O Register address locations, including Timer Interrupt
Registers.
• Bit locations inside all 16-bit Timer/Counter Registers, including Timer Interrupt Registers.
• Interrupt Vectors.
The following control bits have changed name, but have same functionality and register
location:
• PWM10 is changed to WGM10.
• PWM11 is changed to WGM11.
• CTC1 is changed to WGM12.
The following bits are added to the 16-bit Timer/Counter Control Registers:
• 1A and 1B are added to TCCR1A.
• WGM13 is added to TCCR1B.
The 16-bit Timer/Counter has improvements that will affect the compatibility in some special
cases.
BOTTOM The counter reaches the BOTTOM when it becomes 0x0000.
MAX The counter reaches its MAXimum when it becomes 0xFFFF (decimal 65535).
TOP
The counter reaches the TOP when it becomes equal to the highest value in the count
sequence. The top value can be assigned to be one of the fixed values: 0x00FF,
0x01FF, or 0x03FF, or to the value stored in the OCR1A or ICR1 register. The assign-
ment is dependent on the mode of operation.