Datasheet

88
7701F–AVR–10/12
Atmel ATtiny24/44/84 [Preliminary]
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
13.9.3 TCNT0 – Timer/Counter Register
The timer/counter register gives direct access, for both read and write operations, to the
timer/counter unit 8-bit counter. Writing to the TCNT0 register blocks (removes) the compare
match on the following timer clock. Modifying the counter (TCNT0) while the counter is run-
ning, introduces a risk of missing a compare match between TCNT0 and the OCR0x registers.
13.9.4 OCR0A – Output Compare Register A
The Output Compare Register A contains an 8-bit value that is continuously compared with
the counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or
to generate a waveform output on the OC0A pin.
13.9.5 OCR0B – Output Compare Register B
The Output Compare Register B contains an 8-bit value that is continuously compared with
the counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or
to generate a waveform output on the OC0B pin.
Table 13-9. Clock Select Bit Description
CS02 CS01 CS00 Description
0 0 0 No clock source (Timer/Counter stopped)
001clk
I/O
/(No prescaling)
010clk
I/O
/8 (From prescaler)
011clk
I/O
/64 (From prescaler)
100clk
I/O
/256 (From prescaler)
101clk
I/O
/1024 (From prescaler)
1 1 0 External clock source on T0 pin. Clock on falling edge.
1 1 1 External clock source on T0 pin. Clock on rising edge.
Bit 76543210
0x32 (0x52) TCNT0[7:0] TCNT0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
0x36 (0x56) OCR0A[7:0] OCR0A
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
0x3C (0x5C) OCR0B[7:0] OCR0B
Read/Write R/WR/WR/WR/WR/WR/WR/WR/W
Initial Value 0 0 0 0 0 0 0 0