Datasheet
56
7701F–AVR–10/12
Atmel ATtiny24/44/84 [Preliminary]
12. I/O Ports
12.1 Overview
All Atmel
®
AVR
®
ports have true read-modify-write functionality when used as general digital
I/O ports. This means that the SBI and CBI instructions can be used to change direction of one
port pin without unintentionally changing the direction of any other pin. The same applies when
changing drive value (if configured as output) or enabling/disabling of pull-up resistors (if con-
figured as input). Each output buffer has symmetrical drive characteristics with both high sink
and source capability. The pin driver is strong enough to drive LED displays directly. All port
pins have individually selectable pull-up resistors with a supply-voltage invariant resistance.
All I/O pins have protection diodes to both VCC and Ground as indicated in Figure 12-1 on
page 56. See “Electrical Characteristics” on page 178 for a complete list of parameters.
Figure 12-1. I/O Pin Equivalent Schematic
All registers and bit references in this section are written in general form. A lower case “x” rep-
resents the numbering letter for the port, and a lower case “n” represents the bit number.
However, when using the register or bit defines in a program, the precise form must be used.
For example, PORTB3 for bit no. 3 in Port B, here documented generally as PORTxn. The
physical I/O Registers and bit locations are listed in “EXT_CLOCK = external clock is selected
as system clock.” on page 70.
Three I/O memory address locations are allocated for each port, one each for the data register
(PORTx), data direction register (DDRx), and the port input pins (PINx). The port input pins I/O
location is read only, while the data register and the data direction register are read/write.
However, writing a logical one to a bit in the PINx register, will result in a toggle in the corre-
sponding bit in the data register. In addition, the pull-up disable (PUD) bit in the MCUCR
disables the pull-up function for all pins in all ports when set.
Using the I/O port as General Digital I/O is described in “Ports as General Digital I/O” on page
57. Most port pins are multiplexed with alternate functions for the peripheral features on the
device. How each alternate function interferes with the port pin is described in “Alternate Port
Functions” on page 61. Refer to the individual module sections for a full description of the
alternate functions.
C
pin
Logic
R
pu
See Figure
"General Digital I/O" for
Details
Pxn