Datasheet

55
7701F–AVR–10/12
Atmel ATtiny24/44/84 [Preliminary]
• Bits 3..0 – PCINT11..8: Pin Change Enable Mask 11..8
Each PCINT11..8 bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT11..8 is set (logical one) and the PCIE1 bit in GIMSK is set, pin change interrupt
is enabled on the corresponding I/O pin. If PCINT11..8 is cleared, pin change interrupt on the
corresponding I/O pin is disabled.
11.2.5 PCMSK0 – Pin Change Mask Register 0
• Bits 7..0 – PCINT7..0: Pin Change Enable Mask 7..0
Each PCINT7..0 bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT7..0 is set (logical one) and the PCIE0 bit in GIMSK is set, pin change interrupt is
enabled on the corresponding I/O pin. If PCINT7..0 is cleared, pin change interrupt on the cor-
responding I/O pin is disabled.
Bit 76543210
0x12 (0x32) PCINT7 PCINT6 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0 PCMSK0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000