Datasheet

5
7701F–AVR–10/12
Atmel ATtiny24/44/84 [Preliminary]
2.3 Pin Descriptions
2.3.1 VCC
Supply voltage.
2.3.2 GND
Ground.
2.3.3 Port B (PB3...PB0)
Port B is a 4-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability except PB3, which has the RESET capability. To use pin PB3 as an I/O pin instead
of RESET pin, program (‘0’) RSTDISBL fuse. As inputs, Port B pins that are externally pulled
low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when
a reset condition becomes active, even if the clock is not running.
Port B also serves the functions of various special features of the Atmel
®
ATtiny24/44/84 as
listed on Section 12.3 “Alternate Port Functions” on page 61.
2.3.4
RESET
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in Table 9-1 on page
42. Shorter pulses are not guaranteed to generate a reset.
2.3.5 Port A (PA7...PA0)
Port A is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port A output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port A pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port A has an alternate function as analog input for the ADC, analog comparator, timer/coun-
ter, SPI and pin change interrupt as described in Section 12.3 “Alternate Port Functions” on
page 61.